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Huh. What does the TPM port look like? And how did he get an old application to talk to this?

That could be useful for industrial and scientific applications where some ancient hardware from the DOS era is still in use.



> What does the TPM port look like?

From what I understand, there is no standard, it is motherboard-vendor-specific (and can even differ from model to model within the same vendor).

Some motherboards support having the TPM on a daughterboard which plugs into the motherboard. This lets them make it an optional extra, which you have to pay extra for. Nowadays more and more stuff is making a TPM mandatory (e.g. Windows 11), but when they first came out (almost 15 years ago) little used them and why pay for one if you didn't need it? The people who really needed them were most likely enterprise customers, so making them pay extra for a daughterboard is a useful form of market segmentation.

Far less common on newer motherboards, but newer motherboards wouldn't have an LPC bus either – it has been replaced by eSPI. So this hack is really only if you have a moderately old machine – new enough to not have ISA, old enough to have LPC wired through a TPM daughterboard slot.

I suppose, for newer motherboards, you could build an eSPI-to-ISA adapter – heck, you could even build a PCIe-to-ISA adapter, maybe someone has. But I think part of the hack is exploiting the fact that LPC is based on ISA, which makes the circuitry needed to interface the two simpler. Mapping ISA to a more modern bus would be a lot more complicated, since the technological gap you need to bridge is a lot bigger.


TPM uses the LPC (low pin count) bus controller, which provides a 4 bit @ 33 mhz interface... which isn't a coincidence that it is 1/4 the bits at 4x the clock rate as ISA, because that it what it was designed for. So demultiplex the bus back to 16 bit ISA and pull some driver magic and voila.

At least that is what I think is happening here.


> 33 mhz interface.

That's also the clock speed of PCI.

https://en.wikipedia.org/wiki/Low_Pin_Count#Timing_and_perfo...

> At least that is what I think is happening here.

ISA compatibility seems to be limited to byte sized data transfers: https://en.wikipedia.org/wiki/Low_Pin_Count#ISA-compatible_o...




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