If you were designing a new compatible processor for older systems, the limiting factor would be the memory bus. A cache would be necessary to get high speeds.
The cache would need to know about all bank-switching performed by the system, and understand how the memory banks are mapped into the memory space.
Could have:
* Plain read-only memory (you cache this)
* Plain RAM not shared with other devices (you cache this)
* Memory-mapped IO (you don't cache this)
* RAM shared with other devices where the other device does not write there, such as video memory (write-through cache, full read cache)
* RAM shared with other devices where the other device can write there (don't cache this)
Because it’s easy to ‘cache’ the entire memory of the host system, it’s better described as a new computer that only slows down to access the memory locations that affect I/O (video, audio, keyboard, I/O ports, etc.)
“The idea is to use this as a “universal” accelerator for 6502 and 65C02-based host computers – just plug it into the CPU socket. The only thing the FPGA board needs to know about its host is the memory map: Where does the host have memory-mapped I/O? Up to 16 different memory maps can be stored in the FPGA, and selected via a mini DIP switch. Upon power-on, the 65F02 grabs the complete RAM and ROM content from the host and copies it into the on-chip RAM, except for the I/O area. Then the CPU gets going, using the internal memory at 100 MHz for all bus accesses except for any I/O addresses – for these, the internal CPU pauses, and an external bus cycle is started at whatever the external clock speed is.”
Speaking of new computers slowing down to access IO, someone managed to add an ISA slot to new PCs by using pin headers normally used by TPM devices. It's called the "dISAppointment".
The cache would need to know about all bank-switching performed by the system, and understand how the memory banks are mapped into the memory space.
Could have:
* Plain read-only memory (you cache this)
* Plain RAM not shared with other devices (you cache this)
* Memory-mapped IO (you don't cache this)
* RAM shared with other devices where the other device does not write there, such as video memory (write-through cache, full read cache)
* RAM shared with other devices where the other device can write there (don't cache this)