Hacker Newsnew | past | comments | ask | show | jobs | submitlogin

RISC-V implementations are going to prove to be absolute patent minefields.

Just because something is open source will not stop you from being stung during manufacturing, rather like how Android deployments are not free.



So far, patent lawsuits have been more of a problem for those using ARM designs (Qualcomm) than those using RISC-V designs. The Raspberry Pi foundation, Western Digital and Nvidia have successfully put RISC-V designs into their products without any issues. The first two even made their core designs open source (see Hazard3 and SweRV).


How are SiFive going to protect their IP when everyone is free to copy it?

Patents.


You're not free to copy SiFive's IP cores.

Open ISA != all implementations of it are free (although in RISC-V case, many are).


Sorry, that was poorly worded.

My point is that if RISC-V takes off people will struggle to do decent implementations of it without stepping on the toes of the people already in the area.

I'd go so far as to say this is the entire SiFive strategy.


RISC-V already has taken off. There are billions of RISC-V cores shipped in consumer products every year. Adoption outside of the embedded MCU space is slower, but that is natural. Your FUD about SiFive is absurd. Hardware patents related to CPU design are typically ISA independent.


> Hardware patents related to CPU design are typically ISA independent.

So that is merely the entire semiconductor industry patent portfolio that you will have to avoid.


That has not stopped new CPU designs from being made for any architecture and will not stop RISC-V designs from being made. If this were an actual problem, no one could design CPUs.


To quote you elsewhere in this thread:

> Patents tend to expire at different times around the world, plus there is the possibility of submarine patents. Without a declaration from Hitachi, adopting any processor design using their ISA is likely considered a legal risk.

If you combine this with your observation that CPU patents tend to be ISA independent then surely any widespread commercial deployment of RISC-V requires an assertion from everyone else in the semi industry that they do not in fact own patents on your implementation of it or it is likely considered a legal risk.

That or you just hold some things to different standards than others.


There is a history of industry litigation over people implementing others’ ISAs without their full blessing. The Qualcomm ARM lawsuit was the most recent example of this. There is less litigation over people designing CPUs using ISAs whose designers permitted reuse.

You keep trying to spread FUD concerning RISC-V. The issue you are trying to raise is one that if valid, would prevent anyone from designing a CPU, yet many do without legal issues. Hence, the issue you raise is invalid (by modus tollens).


Anyone is free to make a RISC-V CPU without infringing on SiFive’s IP.


Which in practice will mean free to make simplistic implementations using the lessons of twenty years ago.

If this was a winning strategy those open source implementations of SuperH cores would have been incredibly popular instead of dying in obscurity.


SuperH is owned by Hitachi. You cannot use them without a license from Hitachi as far as I know. RISC-V is unique in that its creator permits anyone to make and use RISC-V cores royalty free. It also supports 64-bit, which SuperH never did.

In any case, you should probably stop writing before you shove your foot any deeper into your mouth.


https://j-core.org/

> In any case, you should probably stop writing before you shove your foot any deeper into your mouth.

Apology expected.


You should apologize to the people reading your comments for wasting their time. It is clear you are clueless about RISC-V and your foot is well into your mouth.

As for the J2, its creator does not request licensing fees, but Hitachi might require them. Unlike RISC-V, the creator of SuperH (Hitachi) is not known to have declared the ISA to be royalty free. I am not aware of such a declaration and even if there was, it is irrelevant because there is no reason to use SuperH over RISC-V. Nothing about the J2 supports the FUD you are spreading about RISC-V.


> You should apologize to the people reading your comments for wasting their time. It is clear you are clueless about RISC-V and your foot is well into your mouth.

You're absolutely out of line.

> As for the J2, its creator does not request licensing fees, but Hitachi might require them.

"FUD". The whole point of the timing of the release of the J2 was it is based purely on now expired Hitachi patents, so they do not require any licensing fees.


Patents tend to expire at different times around the world, plus there is the possibility of submarine patents. Without a declaration from Hitachi, adopting any processor design using their ISA is likely considered a legal risk. Beyond that, SuperH just is not very interesting. It lacks 64-bit support and there is very little interest in it by the industry, so software support is not that great.

By the way, my comment telling you that you should apologize to the community received an upvote and likely will receive more. You really are wasting people’s time with your anti-RISC-V FUD.


> By the way, my comment telling you that you should apologize to the community received an upvote and likely will receive more.

I too was upvoted for asking for your apology.

I will not apologize for speaking facts, and nor should you, but it is your random unnecessary insults that are unacceptable.

That's me done with this. You clearly have your opinions, but your behavior has been a discredit to the community you apparently represent.


If you take the time to read my comments thoroughly, you will notice that I always spoke to your behavior, and not to you personally. There has been nothing wrong with my behavior, which has been tame compared to how a number of others in the industry react when encountering things that are wrong or even upon mere disagreement. My only fault is that I do not sugarcoat things, which is hardly a fault in a technical forum where facts and logic are valued.

By the way, having one’s foot in one’s mouth is an idiom meaning you said something wrong, which refers to behavior. It being obvious you are clueless is a reference to your writing, which again, refers to behavior. Saying you should apologize to people for wasting their time is similarly a reference to your behavior, and you invited that criticism by demanding an apology in broken English.


Unfortunately the Internet is full of people who are very confident about things they don't actually have a mastered understanding on. It's not necessarily worthwhile to invest time and effort into interacting with everyone who stated their opinions.


Not so simplistic, see the XiangShan HotChips presentation:

https://hc2024.hotchips.org/assets/program/conference/day2/2...




Guidelines | FAQ | Lists | API | Security | Legal | Apply to YC | Contact

Search: